On the receiver side, a filter bank splits the signal in the same sub-bands as the transmitter. Then on each parallelized
stage, a square law device and an integrator follow, the output of which is sampled at a rate of 1/Tr before demodulation.
The constraints on the antenna and the multiband distribution are the same as those encountered on the transmitter.
Concerning the quadratic detectors, many solutions are conceivable for the square law devices and the required wide working band is not a problem. Additionally, the constraints on the integrators are also relaxed since the input signals are now baseband (with bandwidth between 250 and 500 MHz). The integrators have to be able to integrate these signals over a time period of 10 to 50 ns.
With advances in process technology, it is possible to integrate both these functions on a single chip.
As the solution envisioned for this RF front end is purely analog with passive components, the reciprocity of the device enables us to use the same structure for both transmission and reception. Consequently, the same structure with multiple antennas and energy splitters is possible at the receiver, as shown in Figure 4.